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authorYukihiro "Matz" Matsumoto <[email protected]>2020-01-17 09:28:21 +0900
committerYukihiro "Matz" Matsumoto <[email protected]>2020-05-07 08:38:46 +0900
commitfa8668c77d181a5075dc56fb63d6fa087ab4b1d3 (patch)
tree6ff4773e5be236b2783f4dc47aaa2095bb4454d1 /src
parent47f5f887e892ce46fecd12ad97193a501e09accb (diff)
downloadmruby-fa8668c77d181a5075dc56fb63d6fa087ab4b1d3.tar.gz
mruby-fa8668c77d181a5075dc56fb63d6fa087ab4b1d3.zip
Add a new instruction `OP_LOADI16`.
Which loads 16bit integer to the register. The instruction number should be reorder on massive instruction refactoring. The instruction is added for `mruby/c` which had performance issue with `OP_EXT`. With this instruction, `mruby/c` VM can just raise errors on `OP_EXT` extension instructions.
Diffstat (limited to 'src')
-rw-r--r--src/codedump.c4
-rw-r--r--src/vm.c5
2 files changed, 9 insertions, 0 deletions
diff --git a/src/codedump.c b/src/codedump.c
index 7faa39360..649be176b 100644
--- a/src/codedump.c
+++ b/src/codedump.c
@@ -130,6 +130,10 @@ codedump(mrb_state *mrb, mrb_irep *irep)
printf("OP_LOADI\tR%d\t-%d\t", a, b);
print_lv_a(mrb, irep, a);
break;
+ CASE(OP_LOADI16, BS):
+ printf("OP_LOADI16\tR%d\t%d\t", a, (int)(int16_t)b);
+ print_lv_a(mrb, irep, a);
+ break;
CASE(OP_LOADI__1, B):
printf("OP_LOADI__1\tR%d\t\t", a);
print_lv_a(mrb, irep, a);
diff --git a/src/vm.c b/src/vm.c
index ea1bb5087..26da5831e 100644
--- a/src/vm.c
+++ b/src/vm.c
@@ -1047,6 +1047,11 @@ RETRY_TRY_BLOCK:
NEXT;
}
+ CASE(OP_LOADI16, BS) {
+ SET_INT_VALUE(regs[a], (mrb_int)(int16_t)b);
+ NEXT;
+ }
+
CASE(OP_LOADSYM, BB) {
SET_SYM_VALUE(regs[a], syms[b]);
NEXT;